Required skills and experience:

Ÿ           Sound understanding of semiconductor manufacturing process and transistors

Ÿ           Experience with semiconductor layout methods and layout tool suites (e.g., Cadence, Mentor, etc).

Ÿ           Working knowledge of DRC and LVS tools and deck creation and applicatoin

Ÿ           Basic knowledge of Unix scripting languages (e.g., perl, CSH, SH, Tcl, etc)

Ÿ           Basic knowledge of parametric test methods

Ÿ           Self-motivated and highly professional including some experience with customer interactions

Ÿ           Familiarity with interpreting and using Design Rule Manuals for deep sub-micron semiconductor processes (both foundry and IDM)

Ÿ           Experience with Cadence Virtuoso and/or Cadence SKILL programming language

Ÿ           Experience with Mentor Graphics Calibre DRC

Ÿ           Experience with any part of Design for Manufacturability including design modification, verification, algorithms or failure analysis

Ÿ           Experience using circuit modeling software (HSPICE, Spectre, etc)

Ÿ           Familiarity with semiconductor reticle-making practices (mask data prep, dummy fill algorithms, basics of OPC, mask fracturing and biasing, etc)