About Brite Semiconductor Company:- Brite Semiconductor is a fabless ASIC company delivering the most cost-effective, predictable and reliable custom ASIC solution to electronics product customers worldwide.Brite-Semi’s OpenMODEL™ is the semiconductor industry's first end-to-end custom ASIC solution based on a revolutionary business model that provides a seamless, low-cost, low risk alternative to traditional models for complex ASIC design and development.

We offer a C&B Package with basic salary plus allowance plus medical and life insuranc and stock option opportunity.

 

Position Description:
As a senior member of the team you will be responsible for ensuring customer success through various design service participation.  A qualified applicant for this position would be responsible for the development and support of customer based design from netlist to GDS tapeout, and with a responsibility for driving the design quality to success. 

Qualifications:
• Solid knowledge and experience in Physical design implementation on 0.13um and/or 90 nm and beyond.
• Hands on experience with physical design tools and flow in floor plan / Verilog in; Static and dynamic IR /SI /Antenna violations and solution, CTS and OCV optimization, SDF extraction, timing driven placement and route, congestion analysis /resolution, ECO implementation, macro IP placement, and hierarchical partition flow.    
• Hands on experiences in DRC/LVS verification and debugging, full chip tapeout process and requirement.
• Be able to work with FE designer and EDA tool vendor to resolve tool / flow related issues and drive to advancement to next generation tool / flow automation SOP
• Good written and verbal communication in Mandarins and English; Excellent interpersonal and team work skills
• Design service experience is a plus
• Experience with Perl / Tcl scripting is a plus

n     良好的0.13um和（或）90nm及以上工艺物理层设计应用经验。

n     熟悉以下工作流程：物理层设计工具和嵌入式、静态和动态IR/SI/天线评估和解决方案、CTS和OCV优化、SDF扩展、按时推动布局和走线、ECO处理、宏IP布置等。

n     熟悉DRC/LVS认证和调试，完整的芯片级需求和制程评估。

n     能与FE设计师和EDA工具厂商合作，解决工具和流片相关问题；推动下一代工具和流片自动化SOP的发展。

n     良好的中英文读写能力，良好的沟通和合作能力。

n     有设计服务经验者优先。

n     有Perl/Tcl经验优先。