Logic Design Engineer
【Group./Dept.】CPU Platform
【Responsibilities】
1. Digital ASIC design with 80/65nm process；
2. Design Verification.
【Requirements】
1. Master degree in CS or EE;
2. Experience in SATA or USB design;
3. Experience in logic design, synthesis, static timing analysis, and verification;
4. Experience with ASIC EDA tools used in synthesis, simulation, static timing analysis, and formal verification;
5. Experience in developing simulation and verification test benches;
6. Knowledge of Verilog / System Verilog design language;s
7. Excellent technical troubleshooting and demonstrated problem solving skills;
8. Must be willing to follow a structured design approach including design for reuse and provide thorough design documentation;
9. English writing skill preferred.