Responsibilities 工作职责：
As a software design engineer (FPGA & DSP) for R&S, the candidate will design, implement and test embedded firmware running on FPGA and DSP within a signal generation or analysis instrument for digital video technologies, e.g. ATSC, DVB, CMMB, or ITU-T J.83 A/B/C. The candidate will join a closely knit team of experienced engineers building the next generation products for the digital video industry. Typical duties performed as follow:
该职位工程师将作为R&S的软件开发工程师，设计、实现与测试数字电视标准在信号发生器或信号分析仪上的FPGA与DSP嵌入式软件，如ITU-T A/B/C及CMMB等各项标准。该职位工程师将与R&S具有丰富经验的研发团队紧密合作，参与开发最新数字电视测试仪表。需要承担的典型任务如下：
- Design, simulation, implementation and test of modem algorithms and firmware, incl. RTL modules of digital video technologies for signal generator or analyzer. 设计、仿真和实现信号发生器或信号分析仪的数字电视标准modem算法与软件，包括RTL模块；
- Implementation and test of time-critical measurement and hardware driver routines. 实现并测试时序要求严格的测量程序与硬件驱动程序；
- Integration, test, documentation and maintenance of FPGA/DSP software within the complete instrument system. 在仪表中集成、测试、管理、维护FPGA/DSP软件；
- Establishing a communication link between customer and development group.建立并保持研发团队与客户之间的沟通联系；
- Development of solutions for specific customer requirements.研发满足客户定制需求的产品方案.
Experience/Qualifications 职位要求：
- Master degree or above in EE from a famous university. 重点大学硕士或以上学位毕业， 电子工程、通信工程、信号处理等相关专业；
- Ability to speak/read/write/present in English clearly for both internal and customer communications at a technical level. 能够使用英语听说读讲，并进行技术层面的沟通；
- Experience in working with international teams. 具有跨国公司或多文化背景工作经验；
- A minimum 3 years of relevant work experience. 至少3年相关领域工作经验；
- Proven ability designing, implementing, debugging and understanding complex hardware/software systems and projects. 必须具备理解、设计、实现、调试复杂软硬件系统及相关项目的能力；
- Proven competence at digital signal processing, algorithm design and implementation, incl. OFDM, PSK/QAM modulations, FEC, equalization, synchronisation, etc. 较强的数字信号处理知识与算法实现能力，包括OFDM, PSK/QAM modulations, FEC, equalization, synchronisation等；
- Proven experience in Matlab, Verilog HDL/VHDL and C design techniques and implementation. 必须具有Matlab，Verilog HDL/VHDL及C语言工作经验，掌握相关开发技术；
- Experience integrating software with digital hardware designs involving DSP, ASIC and FPGA.具有在DSP、ASIC、FPGA等数字硬件基础上的软件开发集成能力.