【Responsibilities】
1.Working with Mixed signal designers to create layout and verification;
2.Using embedded debugging tools, utilizing Cadence, Synopsys or Mentor tools.
【Requirements】
1.BS in electronic or microelectronic;
2.Familiar with CMOS analog IC Layout and corresponding EDA tools. Able to do the DRC/LVS/ERC check;
3.Good communication skills and team work spirit;
4.Understanding basic analog circuit designs and transistor physics is a plus；
5. Minimum of 1 years experience as a layout engineer. Layout experience of analog circuit is preferred.