Request
- The candidate should have basic knowledge of HDL (Verilog preferred) and microelectronics.
- Be familiar with IC DESIGN flow, from RTL coding, simulation, synthesis, APR, DRC, LVS. Have tape out experiences is preferable.
- Be good at usage of DC, Astro, or SOC encounter. Be good at APR flow, placement/cts/route.
- Candidate must have excellent ability to learn, explore and solve problems, have team-cooperating and innovating spirit,
- Candidate must possess good Chinese and English communication skills;
Job Description
- Validate EDA software in ASIC design flow, validate tool QoR/TTR/QOS
- In charge of Customer Acceptance Test.
- Responsible for developing,applying and maintaining quality standards for complex EDA software system;