Job Description:
Interface with System Architects (Concept Engineering) and IC Definition team,Implementation (Layout) Team
Write detailed design specification
Define clock, reset and power concept
Study and integrate external IPs
VHDL or Verilog Coding
Testbenches generation according to verification plan
Functional verification of IC
Set up regression-test suite
Gate-level simulation
Assist in test pattern generation (interface with IC Test Development Engineer)
Static timing constraint definition
Requirements:
Masters/Bachelor’s Degree in Electrical/Electronics Engineering or in related field
Tool skills:
General tools (PowerPoint, Word, Excel, Acrobat, etc)
PERL or SHELL languages
Affirma or Modelsim
Design Compiler
PrimeTime
Design for Test concepts
Matlab and Cossap (SystemStudio) or SystemC knowledge is an advantage
Ability to speak and write English is a must
Self-motivated team player and able to work with minimum supervision.